Exploration of Reconfigurable Architectures - ERA
|Project Title||Design & Development of Application-Specific FPGA/Reconfigurable Hardware Generator|
|Funding Organization||ICTRnD Fund|
|Project Directors||Dr. M. Mohiuddin, Dr. Husain Parvez|
|Budget||13.4 million PKR|
|Start date||June 2012|
|Location||Embedded Systems Research Group @ PAF-KIET|
The Field Programmable Gate Arrays (FPGAs) are well known for their hardware flexibility which makes it possible and extremely simple to modify designs quickly, frequently and as late as desired in the design cycle. Low volume production of FPGA-based products is effective and economical because they are easy to design and program in shortest possible time. The generic reconfigurable resources in an FPGA can be programmed to execute a vast variety of applications. However, this very flexibility of FPGAs makes them much larger, slower, and more power consuming than their counterpart ASICs (Application Specific Integrated Circuits) and ASSPs (Application Specific Standard Products). Consequently, FPGAs are unsuitable for applications requiring high volume production, high performance or low power consumption. Therefore, despite enormous benefits of flexibility, the global FPGA revenues in the year 2009 were only 3.3 billion dollars compared to 88 billion dollar revenues of ASICs and ASSPs.
We propose to design a GUI (Graphical User Interface)-based software platform which can be used to design, explore and generate application-specific FPGA and similar reconfigurable architectures. These alternate FPGA (reconfigurable) architectures can be optimized for target applications in terms of area, speed and/or power consumption. The output of this tool will be VHDL files of the optimized FPGA architecture which can be translated into GDSII format files for fabrication using third-party tools. This platform will also map application circuits on the architecture through advanced mapping algorithms and will generate their bitstreams (binary files). These application circuits encompass fields as diverse as data and telecommunication, security, multimedia, medical, and other real-time Digital Signal Processing (DSP) systems.
This project explores new and innovative FPGA/Reconfigurable architectures which have improved area, speed and power consumption performance as compared to traditional FPGA architectures. Different architectures explored in this project will become part of a GUI-based reconfigurable hardware generator.
Architectures supported by this platform will be
First Quarterly deliverables submitted, 10th October 2012
Second Quarterly deliverables submitted, 12th Feburary 2013
Third Quarterly deliverables submitted, 23rd April 2013
Poster deliverable submitted, 1st July 2013
Fourth Quarterly deliverables submitted, 22nd July 2013
Fifth Quarterly Report, 25th October 2013
Sixth Quarterly Report, 12th May, 2014
Seventh Quarterly Report, 22nd July, 2014