Selected Publications

 

Summary of Research Publications

  • 1 Book publication in Springers
  • 2 Book chapters in LNCS Springers
  • 8 Journal publications in JCSC, IJRC, TRETS, Microelectronics, Microprocessors and Microsystems
  • 15 Conference publications in ICFPT, ACM FPGA, ARC, ReCoSoC, Reconfig, Intellect

Book Publications

  1. Application-Specific Mesh-based Heterogeneous FPGA Architectures”, Husain Parvez, and Habib Mehrez. Springer-US, Vol-1, pp1-150, ISBN 978-1-4419-7927-8.

Book Chapters

  1. Comparison between Heterogeneous Mesh-based and Tree-based Application Specific FPGA, Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez, ARC 2011, Springer-Verlag, Belfast UK, pages 218-229, Volume 6578 of LNCS
  2. Application Specific FPGA Using Heterogeneous Logic Blocks”, Husain Parvez, Zied Marrakchi and Habib Mehrez. International Symposium on Applied Reconfigurable Computing, ARC, Volume 5992 of LNCS, Springer, March 2010, Bangkok, Thailand, pages 92-109.

Journal Publications

  1. “An Application Specific Reconfigurable Architecture with Reduced Area and Static Memory Cells”, Muhammad Mazhar Iqbal, Husain Parvez, Fasahat Hussain, Muhammad Rashid, JCSC, July 2020.
  2. “Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing”, Ali Asghar, Muhammad Mazhar Iqbal, Waqar Ahmed, Mujahid Ali, Husain Parvez, Muhammad Rashid, International Journal of Reconfigurable Computing (IJRC), 2017.
  3. “Multi-Circuit: Automatic Generation of an Application Specific Configurable core for known set of application circuits”, Muhammad Mazhar Iqbal, Husain Parvez, Muhammad Rashid, JCSC, Sep 2016.
  4. “An Improved Diffusion-Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs”, Ali Asghar, Husain Parvez, International Journal of Reconfigurable Computing (IJRC), 2015.
  5. “Exploration and optimization of homogeneous tree-based application specific FPGA”, Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez, Elsevier Journal of Microelectronics, January 2013, ISSN 0026-2692, Volume 44(12), 1052-1062
  6. "A New Heterogeneous Tree-based Application Specific FPGA and Its Comparison with Mesh-based Application Specific FPGA", Umer Farooq, Husain Parvez, Zied Marrakchi, Habib Mehrez, Elsevier Journal of Microprocessors and Microsystems, Vol 36, Issue 8, November 2012, pp: 588-605.  
  7. Exploration of Heterogeneous FPGA Architectures”, Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez, International Journal of Reconfigurable computing (IJRC), vol 2011, Feb 2011, 18 pages, Article ID 121404.
  8. Application Specific FPGA using Heterogeneous logic blocks, Husain Parvez, Zied Marrakchi, Alp Kilic, Habib Mehrez, ACM Transaction on Reconfigurable Technology and Systems (TRETS) Vol 4, Issue 3, Aug 2011, Article24

Referred Conference Publications

  1. “Logic algebra for exploiting shared SRAMtable based FPGA for large LUT inputs” , Ali Asghar, Muhammad Mazher Iqbal, Waqar Ahmed, Mujahid Ali, Husain Parvez and Muhammad Rashid, INTELLECT, Karachi, 2017.
  2. “Optmizing Routing Network of Shared Hardware Design for Multiple Application Circuits”, Muhammad Mazhar Iqbal, Husain Parvez, INTELLECT, Karachi, 2017.
  3. “Exploring shared SRAM Tables among NPN equivalent large LUTs in SRAM-based FPGAs”, Ali Asghar, Muhammad Mazhar Iqbal, Waqar Ahmed, Mujahid Ali, Husain Parvez, Muhammad Rashid, ICFPT 2016, Xian, China, 229-232, 2016
  4. “Automatic Generation of a Shared Hardware Design for Multiple Application Circuits”, Muhammad Mazhar Iqbal, Husain Parvez, Frontiers of Information Technology, FIT 2015, Islamabad.
  5. “Design-space exploration between FPGA and ASIF”, M Ameen Qureshi, Husain Parvez, ReCoSoC 2014, Montpeiller, France.
  6. “Exploring alternate trade-offs of placement quality versus runtime in Simulated Annealing algorithm”, Baqar Raza, Husain Parvez, M Mohiuddin, ReCoSoC 2014, Montpeiller, France.
  7. “Diffusion-based Placement algorithm for Reducing High Interconnect demand in Congested Regions of FPGAs”, Ali Asghar, Husain Parvez, ARC 2014, Portugal, 291-297.
  8. Exploring the effect of LUT and Arity Size on a Tree-based Application Specific Inflexible FPGA”, Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez, IEEE DTIS 2011, 6-8 April 2011, Athens, Greece, pages 1-6.
  9. “Exploration of Heterogeneous FPGA Architectures”, Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez, Reconfigurable Communication-centric Systems on Chip, ReCoSoC’10, May, 2010, Karlsruhe, Germany, pages 37-44.
  10. Heterogeneous-ASIF: An Application Specific Inflexible FPGA using Heterogeneous logic blocks”, Husain Parvez, Zied Marrakchi and Habib Mehrez. International Symposium on Field-Programmable Gate Arrays, FPGA'10, February 2010, Monterey, California, page 290.
  11. ASIF: Application Specific Inflexible FPGA”, Husain Parvez, Zied Marrakchi and Habib Mehrez. International Conference on Field-Programmable Technology, ICFPT, Dec 2009, Sydney, Australia, pages 112-119.
  12. “A New Tree-based Coarse-grained FPGA Architecture”, Umer Farooq, Husain Parvez, Zied Marrakchi and Habib Mehrez. IEEE International Conference on PhD. Research in Micro-Electronics, PRIME'09, July 2009, Cork, Ireland, pages 48-51. (Silver Leaf Certificate)
  13. “A New Coarse-grained FPGA Architecture Exploration Environment”, Husain Parvez, Umer Farooq, Zied Marrakchi and Habib Mehrez. International Conference on Field-Programmable Technology, ICFPT'08, December 2008, Taipei, Taiwan, pages 285-288.
  14. “Enhanced Methodology and Tools for Exploring Domain-specific Coarse-grained FPGAs”, Husain Parvez, Zied Marrakchi and Habib Mehrez. IEEE International Conference on Reconfigurable Computing, Reconfig'08, December 2008, Cancun, Mexico, pages 121-126.
  15. “Generic Techniques and CAD tools for automated generation of FPGA layout”, Husain Parvez, Hayder Mrabet and Habib Mehrez. IEEE International Conference on PhD. Research in Micro-Electronics, PRIME'08, June 2008, Istanbul, Turkey, pages 141-144. (Bronze Leaf Certificate)